
Chapter 1
Introduction to the Alliance Tools
The set of tools provided by Alliance lets us design and test a circuit from its specification to its layout form
and many of its intermediate formats. Alliance provides a symbolic cell library that makes the design of circuits
independent of the technology used in their fabrication step. The cells libraries include a standard cell library
and several specific purpose cells for memory and data path logic. Many of the tools in Alliance can be used
independently as command line tools. Others have a graphic user interface that requires Motif and the X11
library used in many variants of UNIX and Linux. If we provide an adequate technology file the design obtained
with Alliance can be converted to CIF or GDSII format for silicon fabrication.
In the following sections we introduce briefly each tool with a very simple example to illustrate their use
and options.
1.1 ASIMUT
ASIMUT (A SIMUlation Tool) is a command-line tool with many capabilities. It can be used to check the
correctness of the description of a circuit in its VHDL behavioral or structural form. It can also be use d for
simulating and generating the outputs of the circuit for a given set of inputs. One runs asimut by typing:
% asimut [options] [target_file] [input_pattern_file] [output_patt ern_ fil e]
Lets try ASIMUT with a small example. For this we will use the behavioral description of the 2-input
multiplexer of Figure 1.1.
Figure 1.1: A 2-input multiplexer.
In this circuit if the control input c is 1 then the output q will take the value present in input a, but if c is
0 then the output of the circuit will take the value of input b.
The description of this circuit in its behavioral form is:
-- mux.vbe : a discrete 2-input mult iple xer circuit
-- VHDL behavioral description
ENTITY mux IS
PORT(
a : IN BIT;
b : IN BIT;
c : IN BIT;
q : OUT BIT;
vdd : IN BIT;
vss : IN BIT );
END mux;
ARCHITECTURE vbe OF mux IS
BEGIN
q <=((a AND c) OR (NOT(c) AND b));
END vbe;
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